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Remove graphical representation of instruction latencies.

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Bartosz Taudul 2022-10-26 21:47:17 +02:00
parent 3afe9a98cf
commit d34af7166e
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3 changed files with 0 additions and 28 deletions
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2
manual/tracy.tex
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@ -3561,8 +3561,6 @@ If the listed assembly code targets x86 or x64 instruction set architectures, ho
Selection of the CPU microarchitecture can be performed using the \emph{\faMicrochip{}~\textmu{}arch} drop-down. Each architecture is accompanied by the name of an example CPU implementing it. If the current selection matches the microarchitecture on which the profiled application was running, the \faMicrochip{}~icon will be green\footnote{Comparing sampled instruction counts with microarchitectural details only makes sense when this selection is properly matched.}. Otherwise, it will be red\footnote{You can use this to gain insight into how the code \emph{may} behave on other processors.}. Clicking on the \faMicrochip{}~icon when it is red will reset the selected microarchitecture to the one the profiled application was running on.
Enabling the \emph{\faTruckLoading{}~Latency} option will display a graphical representation of instruction latencies on the listing. The minimum latency of instruction is represented by a red bar, while the maximum latency is represented by a yellow bar.
Clicking on the \emph{\faFileImport{}~Save} button lets you write the disassembly listing to a file. You can then manually extract some critical loop kernel and pass it to a CPU simulator, such as \emph{LLVM Machine Code Analyzer} (\texttt{llvm-mca})\footnote{\url{https://llvm.org/docs/CommandGuide/llvm-mca.html}}, to see how the code is executed and if there are any pipeline bubbles. Consult the \texttt{llvm-mca} documentation for more details. Alternatively, you might click the \RMB{}~right mouse button on a jump arrow and save only the instructions within the jump range, using the \emph{\faFileImport{}~Save jump range} button.
\subparagraph{Instruction dependencies}

25
server/TracySourceView.cpp
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@ -267,7 +267,6 @@ SourceView::SourceView()
, m_showJumps( true )
, m_locAddrIsProp( false )
, m_cpuArch( CpuArchUnknown )
, m_showLatency( false )
{
m_microArchOpMap.reserve( OpsNum );
for( int i=0; i<OpsNum; i++ )
@ -2416,11 +2415,6 @@ uint64_t SourceView::RenderSymbolAsmView( const AddrStatData& as, Worker& worker
ImGui::EndCombo();
}
ImGui::PopStyleVar();
ImGui::SameLine();
ImGui::Spacing();
ImGui::SameLine();
SmallCheckbox( ICON_FA_TRUCK_RAMP_BOX " Latency", &m_showLatency );
}
}
@ -3997,25 +3991,6 @@ void SourceView::RenderAsmLine( AsmLine& line, const AddrStat& ipcnt, const Addr
}
}
if( m_showLatency && asmVar && asmVar->minlat >= 0 )
{
const auto pos = ImVec2( (int)ImGui::GetCursorScreenPos().x, (int)ImGui::GetCursorScreenPos().y );
const auto ty = ImGui::GetTextLineHeight();
if( asmVar->minlat == 0 )
{
DrawLine( draw, pos + ImVec2( 0.5f, -0.5f ), pos + ImVec2( 0.5f, ty + 0.5f ), 0x660000FF );
}
else
{
draw->AddRectFilled( pos, pos + ImVec2( ty * asmVar->minlat + 1, ty + 1 ), 0x660000FF );
}
if( asmVar->minlat != asmVar->maxlat )
{
draw->AddRectFilled( pos + ImVec2( ty * asmVar->minlat + 1, 0 ), pos + ImVec2( ty * asmVar->maxlat + 1, ty + 1 ), 0x5500FFFF );
}
}
const bool inContext = IsInContext( worker, line.addr );
int isSelected = asmIdx == m_asmSelected;
if( !isSelected && line.regData[0] != 0 )

1
server/TracySourceView.hpp
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@ -268,7 +268,6 @@ private:
CpuArchitecture m_cpuArch;
int m_selMicroArch;
int m_idxMicroArch, m_profileMicroArch;
bool m_showLatency;
unordered_flat_set<uint32_t> m_asmSampleSelect;
unordered_flat_set<uint32_t> m_srcSampleSelect;