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https://github.com/wolfpld/tracy
synced 2025-04-30 12:53:51 +00:00
Move ring identifier check out of the loop.
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145e3e213a
commit
aee8336847
@ -1150,18 +1150,18 @@ void SysTraceWorker( void* ptr )
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const auto id = ring.GetId();
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const auto id = ring.GetId();
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assert( id != EventContextSwitch );
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assert( id != EventContextSwitch );
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const auto end = head - tail;
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const auto end = head - tail;
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uint64_t pos = 0;
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uint64_t pos = 0;
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while( pos < end )
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if( id == EventCallstack )
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{
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{
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perf_event_header hdr;
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while( pos < end )
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ring.Read( &hdr, pos, sizeof( perf_event_header ) );
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if( hdr.type == PERF_RECORD_SAMPLE )
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{
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{
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auto offset = pos + sizeof( perf_event_header );
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perf_event_header hdr;
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if( id == EventCallstack )
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ring.Read( &hdr, pos, sizeof( perf_event_header ) );
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if( hdr.type == PERF_RECORD_SAMPLE )
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{
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{
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auto offset = pos + sizeof( perf_event_header );
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// Layout:
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// Layout:
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// u32 pid, tid
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// u32 pid, tid
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// u64 time
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// u64 time
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@ -1194,8 +1194,19 @@ void SysTraceWorker( void* ptr )
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TracyLfqCommit;
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TracyLfqCommit;
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}
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}
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}
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}
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else
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pos += hdr.size;
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}
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}
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else
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{
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while( pos < end )
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{
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perf_event_header hdr;
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ring.Read( &hdr, pos, sizeof( perf_event_header ) );
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if( hdr.type == PERF_RECORD_SAMPLE )
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{
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{
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auto offset = pos + sizeof( perf_event_header );
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// Layout:
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// Layout:
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// u64 ip
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// u64 ip
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// u64 time
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// u64 time
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@ -1239,8 +1250,8 @@ void SysTraceWorker( void* ptr )
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MemWrite( &item->hwSample.time, t0 );
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MemWrite( &item->hwSample.time, t0 );
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TracyLfqCommit;
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TracyLfqCommit;
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}
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}
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pos += hdr.size;
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}
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}
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pos += hdr.size;
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}
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}
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assert( pos == end );
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assert( pos == end );
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ring.Advance( end );
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ring.Advance( end );
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