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16 Commits

Author SHA1 Message Date
Nicolas Clauvelin
263bd8913d Project maintenance and review
This commit is a collection of changes related to:

- Code style fixes (including nolint) and formatting.
- Suppression of compiler warnings in bitwise operations.
- Minor edits (e.g. copyright dates).
2022-01-27 12:26:40 -05:00
Nicolas Clauvelin
c1081a114e Code maintenance
* Revise and simplify most enable_if statements in the project.
* Update code style in all files.
* Update copyright year.
* Add a dedicated Memory.h header with the memory device implementation.
* Update documentation.
* CMake cleanup.
2019-04-24 17:00:57 -04:00
Nicolas Clauvelin
2e0d502674 BUG FIX IN MERGER WRITE IMPLEMENTATION FOR NON CONSTANT VALUES
* For write-only registers the merge write implementation for non-constant values
was properly updating the cache value.
* Unnecessary `inline` have been removed.
2018-11-16 09:28:47 -05:00
Nicolas Clauvelin
819a004588 API DOCUMENTATION UPDATED
Register pack loop revised for consistency.
2018-03-20 11:20:42 -04:00
Nicolas Clauvelin
5925c223c8 INTERNAL IMPLEMENTATIONS RELOCATED TO AN INTERNALS HEADER
The Internals.h contains the overflow, is_aligned and memory array
implementations.
2018-03-16 14:12:52 -04:00
Nicolas Clauvelin
8cdc89336f UPDATED SINGLE HEADER 2018-03-15 17:25:06 -04:00
Nicolas Clauvelin
95288090d4 ADD ENUMERATION TYPE FOR SUPPORTED REGISTER SIZES
Register sizes are now represented by an enumeration type. This limits the
possibility to typeset unsupported register sizes, and make the interface easier
to read.

See #12.
2018-03-15 17:13:54 -04:00
Nicolas Clauvelin
6a99ea5de6 UPDATED SINGLE HEADER 2018-03-13 17:44:47 -04:00
Nicolas Clauvelin
bbdf513156 ADD MIXED REGISTER SIZES SUPPORT TO REGISTER PACK
This relies on a memory map implementation based on std::array and specialized
over the register size. PackedRegister can now be used with all supported
register sizes (i.e., widths).

This relates to #7 and the finalization of the API before performance testing.
2018-03-13 08:48:42 -04:00
Nicolas Clauvelin
984d4ceb58 ADD TEMPLATE FOR LOOP IMPLEMENTATION 2018-03-12 17:51:00 -04:00
Nicolas Clauvelin
4d575c176f UPDATED SINGLE HEADER 2018-03-12 16:37:29 -04:00
Nicolas Clauvelin
eb9226fe5d API REVISED FOR BETTER READ/WRITE PERFORMANCE
* For trivial read/write operations (over whole register) simpler implementations are now used to avoid unnecessary load/store instructions.
* Merge write implementation has been revised to provide better performance when manipulating constant values.
* `is_set` and `is_clear` are now available for all Field-based types.

This closes #8.
2018-03-09 16:31:56 -05:00
Nicolas Clauvelin
1c27f907a5 FIXES CONSTEXPR STATIC ISSUE WITH GCC 4.8.X
See https://github.com/sendyne/cppreg/issues/2 for a detailed explanation.

This closes #2.
2018-02-23 06:15:58 -05:00
Nicolas Clauvelin
11734b0bf4 FIX POWERPC COMPILATION ISSUE
For some reason compilers other than GCC PowerPC 4.5.8 were not complaining
about the `use_shadow` being (re)defined outside the `Shadow` structure
definition.

This closes #2.
2018-02-22 17:02:59 -05:00
Nicolas Clauvelin
5cf8a851d8 FIX INLINING OF WRITE CALLS WITH Os ENABLED
The inlining issue was due to a bad template design in the access policies
implementations: the MMIO_t type from the field was used (which is a volatile
type) for all arguments in the write implementation.
The new implementation relies on two template types (one for the register memory
device and another one for the value to be written). This fixes inlining and was
checked on godbolt.
2018-02-22 10:22:51 -05:00
Nicolas Clauvelin
d7404ab946 INITIAL COMMIT 2018-02-20 15:38:59 -05:00