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update performance values in docu
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@ -13,27 +13,33 @@ following table. Performance measurements were taken using `rdtsc` and
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platforms. In each case, cache warm-up was accounted for, and the one
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platforms. In each case, cache warm-up was accounted for, and the one
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running thread was pinned to a single CPU.
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running thread was pinned to a single CPU.
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[table Performance of asymmetric coroutines
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[table Performance of asymmetric coroutines (using captured_context)
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[
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[
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[Platform]
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[Platform]
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[switch]
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[switch]
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[construction (protected stack-allocator)]
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[construction (protected stack-allocator)]
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[construction (preallocated stack-allocator)]
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[construction (standard stack-allocator)]
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[construction (standard stack-allocator)]
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]
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]
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[
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[
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[i386 (AMD Athlon 64 DualCore 4400+, Linux 32bit)]
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[x86_64 (Intel Core2 Q6700, Linux 64bit)]
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[49 ns / 50 cycles]
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[7 ns / 20 cycles]
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[51 \u00b5s / 51407 cycles]
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[19 \u00b5s / cw6306445402 cycles]
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[14 \u00b5s / 15231 cycles]
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[10 \u00b5s / 29896 cycles]
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[14 \u00b5s / 15216 cycles]
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]
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]
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[table Performance of asymmetric coroutines (using execution_context)
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[
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[Platform]
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[switch]
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[construction (protected stack-allocator)]
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[construction (standard stack-allocator)]
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]
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]
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[
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[
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[x86_64 (Intel Core2 Q6700, Linux 64bit)]
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[x86_64 (Intel Core2 Q6700, Linux 64bit)]
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[12 ns / 39 cycles]
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[140 ns / 424 cycles]
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[16 \u00b5s / 41802 cycles]
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[14 \u00b5s / 32750 cycles]
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[6 \u00b5s / 10350 cycles]
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[8 \u00b5s / 15313 cycles]
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[6 \u00b5s / 18817 cycles]
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]
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]
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]
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]
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